Sometimes all one wants is some blinking lights! #rustlang on #stm32
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Yep, that's the intent Not going to be any time soon though as I will be going this on my slow track :D
It will indeed be open HW open FW open host SW. MOAR OPENS
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Current sitrep: Hardware prototype A fully functional, including the noise gens. Firmware design proceeding. Crypto algorithm selection underway.
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Noise source(s) being "noisy diode", much like trac.cryptech.is/wiki/NoisyD…, isn't it?
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pair of bjt junctions in reverse bias. So yes, similar idea.
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Are you sampling voltage or measuring time between flanks?
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Replying to @ln4711
level measured on a clock. And there are prototype schematics though not fully published yet it will all be open.

Jun 10, 2019 Β· 7:34 PM UTC